IR–S/PDIF Transmitter Circuit Diagram
At a sampling frequency of 48 kHz, it’s necessary to be able to transfer pulses only 163 ns wide! The LEDs selected here (Agilent HSDL-4230) have optical rise and fall times of 40 ns, which proved to be fast enough in practice. With a beam angle of only 17°, they can also provide high light intensity. The downside is that the combination of transmitter and receiver is highly directional, but the small beam angle also has its advantages. It means that fewer LEDs are necessary, and there is less risk of continuously looking into an intense infrared source. The circuit is essentially built according to a standard design. The S/PDIF signal received on K1 is amplified by IC1a to a level that is adequate for further use. JP1 allows you to use a Toslink module as the signal source if desired. JP1 is followed by a voltage divider, which biases IC1b at just below half of the supply voltage.
This causes the output level of the buffer stage driving switching transistor T1 to be low in the absence of a signal, which in turn causes IR LEDs D1 and D2 to remain off. The buffer stage is formed by the remaining gates of IC1. This has primarily been done with an eye to elevated capacitive loading, in the unlikely event that you decide to use more LEDs. A small DMOS transistor (BS170) is used for T1; it is highly suitable for fast switching applications. Its maximum switching time is only 10 ns (typically 4 ns). Getting D1 and D2 to conduct is not a problem. However, stopping D1 and D2 from conducting requires a small addition to what is otherwise a rather standard IR transmitter stage, due to the presence of parasitic capacitances.
This consists of R7 and R8, which are connected in parallel with the LEDs to quickly discharge the parasitic capacitors. The drawback of this addition is naturally that it somewhat increases the current consumption, but with the prototype this proved to be only around 10 percent. With no signal, the circuit consumes only 25 mA. With a signal, the output stage is responsible for nearly all of the current consumption, which rises to approximately 170 mA. In order to prevent possible interference at such high currents and avoid degrading the signal handling of the input stage, everything must be well decoupled. For instance, the combination of L2, C4 and C5 is used to decouple IC1.
The circuit around T1 must be kept as compact as possible and placed as close as possible to the voltage regulator, in order to prevent the generation of external interference or input interference. If necessary, place a noise-suppression choke (with a decoupling capacitor to ground) in series with R9. Note that this choke must be able to handle 0.3 A, and if you use additional stages, this rating must be increased proportionally. The circuit should preferably be fitted into a well-screened enclosure, and it is recommended to provide a mains filter for the 230-V input of the power supply. For the sake of completeness, we have included a standard power supply in the schematic diagram, but any other stabilised 5-V supply could be used as well. LED D3 serves as the obligatory mains power indicator.
Author: T. Giesberts
Copyright: Elektor Electronics
Copyright: Elektor Electronics
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